48 open listings · Page 1 of 2
Roles posted by organizations here, alongside roles we found on employers’ own careers sites. Crawled roles say so on the card and send you to the employer to apply. Only show organizations on Career App
NVIDIA 2027 Internships: Hardware Verification
NVIDIA
Internship · Santa Clara, CA · $20 – $71 / hour
NVIDIA is hiring interns for a 12-week hardware verification program where you'll work on projects validating GPUs and processors using industry tools and methodologies. This suits students pursuing electrical or computer engineering degrees who want hands-on experience with verification workflows in accelerated computing.
Listed on NVIDIA’s careers site · Apply there ↗
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Sr. ASIC Layout Design Engineer
FLIR Systems
Goleta, CA · $113,600 – $151,400
Teledyne seeks an experienced layout engineer to design the semiconductor layouts for infrared imaging chips used in defense, medical, and scientific applications. You'll work with analog and digital design teams to translate schematics into high-performance integrated circuits, managing signal integrity and manufacturing constraints from concept through production.
Listed on FLIR Systems’s careers site · Apply there ↗
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Design For Test Engineer IV (IC)
Arrow Electronics
Full-time · San Jose, CA · $112,200 – $170,500
This role involves implementing Design-For-Test strategies on advanced networking chips, including scan insertion, pattern generation, and memory built-in self-test verification. It's suited for an experienced test engineer comfortable with industry-standard DFT tools and semiconductor design flows.
Listed on Arrow Electronics’s careers site · Apply there ↗
FPGA Engineer
AeroVironment
Full-time · 3 locations · $88,500 – $135,000
This role involves designing and deploying firmware for space-based FPGA and embedded systems, working on high-reliability electronics for aerospace applications. It suits engineers with hardware description language experience who want to specialize in space technology and radiation-hardened system design.
Listed on AeroVironment’s careers site · Apply there ↗
Choose a location to apply
Engineering Technician
Adtran
Adtran Huntsville HQ
A skilled technician supporting hardware and software engineers at a networking equipment company through assembly, testing, documentation, and design verification work. This role suits someone with electronics training and hands-on lab experience who can work independently across multiple engineering disciplines.
Microsoft WordFile Transfer Protocol (FTP)VoIP SystemsHTMLDynamic Host Configuration Protocol (DHCP)Power Platform CLI
Listed on Adtran’s careers site · Apply there ↗
NAND BM IP DV Engineer
Samsung Semiconductor
Samsung is seeking a design verification engineer to build and enhance test environments for memory semiconductor products, working with industry-standard verification methodologies. This role suits experienced engineers who are comfortable debugging complex systems independently while collaborating closely with design teams.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
Senior Formal Verification Engineer – AI SoC Development
Intel
Full-time · $220,920 – $311,890
This role leads formal verification strategy for Intel's AI chip designs, ensuring correctness through advanced formal methods and SystemVerilog assertions. It suits senior engineers with deep expertise in formal verification methodologies who can mentor others and drive sign-off on complex SoC blocks.
Listed on Intel’s careers site · Apply there ↗
New College Grad - Product Yield Enhancement Engineer, HBM
Micron Technology
Full-time · Boise, ID
This role involves analyzing failures in high-bandwidth memory products through electrical and physical testing techniques to identify manufacturing root causes and support production ramp. It suits recent graduates in engineering or materials science who want to launch a career in semiconductor yield engineering with hands-on experience in fault isolation and process improvement.
Listed on Micron Technology’s careers site · Apply there ↗
Design Engineer
Broadcom Inc.
Full-time · 3 locations · $60,200 – $96,300
Join Broadcom's ASIC design team to work on physical implementation of high-performance custom silicon for AI and networking products, gaining hands-on experience with advanced process nodes and modern design tools. This role suits engineers with VLSI fundamentals who want exposure to the complete chip design cycle in a collaborative, learning-focused environment.
Listed on Broadcom Inc.’s careers site · Apply there ↗
Choose a location to apply
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Physical Design Engineer
Ambarella
US Headquarters · $140,000 – $156,000
This role involves designing and optimizing the physical layout of advanced AI processor chips, from initial floorplanning through final verification and tape-out. It suits engineers with several years of experience in digital chip design who want to work on cutting-edge low-power SoCs using industry-standard tools.
Listed on Ambarella’s careers site · Apply there ↗
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Senior FPGA Engineer
Astranis
San Francisco, CA · $175,000 – $240,000
Astranis is hiring a senior engineer to design and verify FPGA logic for satellites and ground stations, working across radiation-tolerant hardware, high-speed data systems, and software-defined radios. This role suits someone with 5+ years of RTL experience who thrives in aerospace and wants to grow into a technical leader on a rapidly expanding team.
Listed on Astranis’s careers site · Apply there ↗
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Design Verification Engineer
Baidu
Sunnyvale, CA
This role verifies the functionality of AI accelerator chips at Baidu's Sunnyvale office, requiring someone with deep UVM and SystemVerilog expertise to develop testbenches, run simulations, and close coverage across block and system levels. It suits experienced verification engineers who want to work on cutting-edge AI silicon and thrive in a fast-paced technical environment.
Listed on Baidu’s careers site · Apply there ↗
NVIDIA 2027 Internships: Hardware Physical Design / VLSI
NVIDIA
Internship · Santa Clara, CA · $20 – $71 / hour
NVIDIA is seeking interns to work on hardware physical design and VLSI projects that impact the company's accelerated computing business. This role suits students in electrical or computer engineering pursuing a degree who want hands-on experience with industry-leading chip design tools and methodologies.
Listed on NVIDIA’s careers site · Apply there ↗
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Senior Design Verification Engineer (eInfochips Inc)
Arrow Electronics
Full-time · US-MN-Minnesota (Remote Employees)
This role involves designing and building verification environments for semiconductor products using industry-standard methodologies and tools. It suits experienced engineers who excel at test automation and debugging complex hardware systems at the subsystem and system level.
Listed on Arrow Electronics’s careers site · Apply there ↗
Sr. Staff Physical Design PPA Engineer
Samsung Semiconductor
Full-time · Austin, TX · $180,200 – $270,400
Samsung seeks a senior physical design engineer to lead power, performance, and area optimization initiatives across their GPU and custom semiconductor IP. This role suits experienced design implementation professionals who excel at problem-solving, understand chip design flows deeply, and can drive methodology improvements across synthesis, place-and-route, and signoff.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
Director, SoC Design Engineering
Intel
Full-time · $220,920 – $311,890
Lead functional verification strategy and execution for Intel's advanced system-on-chip designs, mentoring engineers while driving innovation across simulation, emulation, and formal verification methodologies. This role suits experienced verification engineers ready to influence Intel's technical direction and shape product quality at scale.
Listed on Intel’s careers site · Apply there ↗
Lead ASIC Design Engineer
Broadcom Inc.
Full-time · San Jose, CA · $143,800 – $230,000
This role leads the digital design of next-generation chips from architecture through tape-out, requiring deep expertise in RTL, synthesis, timing, and cross-team coordination. It suits experienced ASIC engineers ready to own a complete silicon project as the primary technical authority.
Listed on Broadcom Inc.’s careers site · Apply there ↗
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FPGA Engineer
Astranis
Full-time · San Francisco, CA · $140,000 – $205,000
Design and verify RTL for high-performance FPGAs used in satellite communications systems, working across hardware, software, and DSP teams to deliver radiation-hardened designs for commercial and government customers. This role suits engineers with hands-on FPGA experience who thrive in a fast-paced aerospace environment and want to work on systems operating at scale in orbit.
Listed on Astranis’s careers site · Apply there ↗
NVIDIA 2027 Internships: Hardware Engineering
NVIDIA
Internship · Santa Clara, CA · $20 – $71 / hour
NVIDIA is recruiting interns for a 12-week program across several hardware engineering specializations, including system validation, hardware design, mechanical engineering, and silicon solutions. The role suits students pursuing degrees in electrical engineering, computer engineering, or related fields who want hands-on experience with datacenter and consumer hardware products.
Listed on NVIDIA’s careers site · Apply there ↗
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Physical Design Engineer II (eInfochips Inc)
Arrow Electronics
Full-time · San Jose, CA
This role executes the physical design and place-and-route phases of ASIC chip development, collaborating with RTL and architecture teams to meet timing and power targets through the full implementation flow. It suits engineers with 7+ years of hands-on EDA tool experience who want to work on advanced-node chip design at scale.
Listed on Arrow Electronics’s careers site · Apply there ↗
Senior Staff Engineer, Physical Design (Floorplanning)
Samsung Semiconductor
Full-time · Austin, TX · $180,200 – $270,400
Samsung is seeking a Senior Staff GPU Physical Design Engineer to lead floorplanning and power-grid implementation for next-generation high-performance GPU and system-level designs. This role suits experienced physical design engineers who can drive methodology innovation, mentor others, and deliver silicon across advanced technology nodes.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
CAD/EDA Tools Automation Engineer
Intel
Full-time · 2 locations · $149,600 – $245,160
This role develops software tools and automation infrastructure for semiconductor design and manufacturing, working with EDA platforms and build systems. It suits engineers with a strong programming foundation who want to bridge software development and hardware design automation.
Listed on Intel’s careers site · Apply there ↗
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Analog/Mixed Signal Verilog Modeling Design Engineer
Broadcom Inc.
This role develops behavioral models of analog circuit blocks in SystemVerilog for chip verification, bridging the analog design and digital verification teams. It suits engineers with strong analog circuit knowledge who can code detailed mixed-signal simulations and validate them against schematics.
Listed on Broadcom Inc.’s careers site · Apply there ↗
NVIDIA 2027 Internships: Hardware Design for Test (DFT)
NVIDIA
Internship · Santa Clara, CA · $20 – $71 / hour
NVIDIA is seeking graduate students to work on hardware design for test infrastructure over a 12-week internship, contributing to chip validation and debugging on their accelerated computing platforms. This role suits ambitious engineers interested in semiconductor testing, timing analysis, and design automation within a leading AI hardware company.
Listed on NVIDIA’s careers site · Apply there ↗
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Physical Design Engineer (Einfochips Inc)
Arrow Electronics
Full-time · $87,400 – $165,000
A physical design engineer needed to execute synthesis, place-and-route, and timing analysis for ASIC chip partitions while collaborating with architects and RTL designers to resolve implementation challenges. This role suits engineers with deep expertise in EDA tools and advanced node technologies who can manage tight schedules and drive design convergence.
Listed on Arrow Electronics’s careers site · Apply there ↗