$143,800 – $230,000
Listed on Broadcom Inc.’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role leads the digital design of next-generation chips from architecture through tape-out, requiring deep expertise in RTL, synthesis, timing, and cross-team coordination. It suits experienced ASIC engineers ready to own a complete silicon project as the primary technical authority.
Our summary, not Broadcom Inc.’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- 12+ years ASIC/SoC digital design experience
- Proven track record as design lead or owning chip projects
- Expert-level SystemVerilog/Verilog proficiency
- Deep experience with synthesis and STA EDA tools
- History of successful first-pass silicon tape-outs on modern process nodes
- Outstanding documentation and communication skills
- Legal US work authorization
- Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field
Nice to have
- Mixed-signal or high-speed PHY architecture experience (SerDes, PCIe, DDR, custom interconnects)
- DFT planning and scan insertion experience
- Scripting proficiency (Python, Tcl, Perl)