AE
Listed on Arrow Electronics’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role executes the physical design and place-and-route phases of ASIC chip development, collaborating with RTL and architecture teams to meet timing and power targets through the full implementation flow. It suits engineers with 7+ years of hands-on EDA tool experience who want to work on advanced-node chip design at scale.
Our summary, not Arrow Electronics’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- 7+ years of hands-on physical design and implementation experience
- Proficiency with EDA tools such as Innovus, Tempus, and Quantus
- Deep understanding of physical design flows and methodologies
Nice to have
- 7+ years in physical design roles
- Ability to adhere to tight schedules
- Low-power design techniques
- System-on-Chip design and implementation experience
- Sub-7nm node technology expertise
- Strong TCL scripting skills for custom EDA flows