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SystemVerilog

Engineering (Mechanical, Electrical, Civil and Environmental)

A hardware description and verification language (HDL/HVL) used primarily by electronics and semiconductor engineers to design and verify digital circuits and chips, extending the older Verilog language with object-oriented programming features, assertions, and advanced testbench capabilities. It's an IEEE standard (1800) widely used in the chip design industry alongside tools from vendors like Cadence, Synopsys, and Mentor Graphics (Siemens EDA). Engineers use it both for RTL (register-transfer level) design and for building sophisticated verification environments like UVM (Universal Verification Methodology).

See who is hiring

SystemVerilog in the job market

Last checked September 13, 2026

Open roles
62

on Career App right now

Employers
13

hiring for it

Median pay
$187,000

from 41 roles

Disclose pay
66%

of these roles

Open roles requiring SystemVerilog (62)

Apply for Senior FPGA/AIE Engineer at Lynk Global on their site

Senior FPGA/AIE Engineer

Lynk Global

Chantilly, VA

Lynk is seeking a senior engineer to design and implement FPGA-based radio systems for satellite communications payloads, working across high-speed digital signal processing, device drivers, and testing methodologies for space deployment. This role suits experienced FPGA developers with deep expertise in AMD Versal architectures and a background in signal processing or wireless communications.

Listed on Lynk Global’s careers site · Apply there ↗

ASIC Design Engineer (eInfochips)

Arrow Electronics

Full-time

This role involves designing and verifying digital circuits using Verilog and industry-standard EDA tools, with particular emphasis on high-speed interfaces and low-power design techniques. It suits experienced hardware engineers who are comfortable with scripting and customer communication in a consultant-style environment.

Listed on Arrow Electronics’s careers site · Apply there ↗

AeroVironment

FPGA Engineer

AeroVironment

Full-time · Albuquerque, NM · $88,500 – $135,000

This role involves designing and deploying firmware for space-based FPGA and embedded systems, working on high-reliability electronics for aerospace applications. It suits engineers with hardware description language experience who want to specialize in space technology and radiation-hardened system design.

Listed on AeroVironment’s careers site · Apply there ↗

Samsung Semiconductor

DFT Design Engineer

Samsung Semiconductor

Samsung Semiconductor India seeks a Design for Test engineer with deep expertise in semiconductor verification and BIST architectures to lead DFT activities from concept through silicon validation. This senior role suits someone with 12-20 years' experience working across scan design, memory testing, and complex verification methodologies on cutting-edge semiconductor products.

Listed on Samsung Semiconductor’s careers site · Apply there ↗

NVIDIA

ASIC Design Engineer - Hardware

NVIDIA

Full-time · Austin, TX · $116,000 – $189,750

NVIDIA is hiring an ASIC Design Engineer to develop system-level methodologies and RTL for measuring performance across GPU and SOC projects. This role suits engineers with RTL design experience who want to work on performance monitoring systems and collaborate across hardware and software teams.

Listed on NVIDIA’s careers site · Apply there ↗

Intel

Senior Director, AI SOC Design Verification

Intel

Full-time · Santa Clara, CA · $256,050 – $361,480

This role leads a team of design verification engineers building and validating AI accelerator chips and subsystems at Intel. It suits experienced engineering managers who combine deep expertise in hardware verification with leadership across complex, security-focused silicon projects.

Listed on Intel’s careers site · Apply there ↗

Micron Technology

ASIC Design Verification Engineer

Micron Technology

Minneapolis, MN

Design verification engineer role focused on developing and maintaining UVM-based simulation environments for advanced semiconductor systems, involving constrained random testing, coverage analysis, and debugging of complex functional issues. Suits experienced verification engineers interested in working on sophisticated SOC designs and exploring AI-assisted verification techniques.

Listed on Micron Technology’s careers site · Apply there ↗

Broadcom Inc.

Principal IC Design Engineer

Broadcom Inc.

$127,100 – $203,400

A principal-level IC design role focused on high-performance DRAM interface architecture and system-on-chip integration at a major semiconductor company. Suited for experienced engineers with deep expertise in memory subsystem design, SOC architecture, and the ability to lead cross-functional technical teams through complex design trade-offs.

Listed on Broadcom Inc.’s careers site · Apply there ↗

Sr. ASIC Design Engineer

Ambarella

US Headquarters · $135,000 – $170,000

This role designs specialized processors for edge AI applications, focusing on video compression and image processing hardware using Verilog and SystemVerilog. It suits engineers with a computer engineering background who want to work on cutting-edge AI accelerators for robotics and embedded systems.

Listed on Ambarella’s careers site · Apply there ↗

Silicon Engineer

Menlo Ventures Portfolio

New York, NY · $320,000 – $485,000

Anthropic is building a custom silicon team to support their massive AI training and inference workloads, and seeks an experienced engineer to own end-to-end technical decisions across domains like design, verification, or physical implementation. This role suits someone who has shipped silicon before, can operate independently on a small founding team, and is comfortable making architecture calls and working with external partners.

Listed on Menlo Ventures Portfolio’s careers site · Apply there ↗

View all 62 on Jobs

Asked for alongside SystemVerilog

Measured from the 62 open roles that name SystemVerilog — not from a curated list.

What employers state they pay

Median

$187,000

Middle half

$165,000 – $201,000

From 41 of 62 open roles — the 66% that publish a range, annualized to USD. Only some employers state pay, and the ones that do skew to California and New York, where the law requires it.

Who employers are hiring

  • Entry5%
  • Mid15%
  • Senior69%
  • Lead / Staff / Principal7%
  • Management3%

From 59 roles whose posting states a level.

Where SystemVerilog roles are

Among the 30 of 62 open roles we could place on a map.

Employers hiring for SystemVerilog

13 in total, most open roles first.

Related skills

Curated neighbors in the taxonomy, whether or not employers ask for them together.

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