Skill
Very Large Scale Integration (VLSI)
Engineering (Mechanical, Electrical, Civil and Environmental)
VLSI refers to the process of creating integrated circuits by combining millions or billions of transistors onto a single chip, forming the basis of modern microprocessors, memory chips, and other semiconductor devices. VLSI engineers design, simulate, and verify chip layouts using specialized tools and hardware description languages like Verilog or VHDL. It is a core discipline within electrical engineering and the semiconductor industry.
Very Large Scale Integration (VLSI) in the job market
Last checked September 13, 2026
- Open roles
- 10
- Employers
- 3
- Median pay
- —
- Disclose pay
- —
on Career App right now
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Open roles requiring Very Large Scale Integration (VLSI) (10)
Senior Physical Design Interposer Engineer
NVIDIA
$136,000 – $218,500
Build automation infrastructure and design flows for NVIDIA's advanced interposer designs, working with elite hardware engineers to solve complex semiconductor packaging challenges. This role suits someone with strong VLSI flow development experience who wants to optimize the tools and methodologies that enable high-impact chip design at scale.
Listed on NVIDIA’s careers site · Apply there ↗
ICE Graduate Talent
Intel
Contract
Intel's graduate talent program welcomes fresh engineers and professionals with up to two years of experience to contribute to semiconductor and technology initiatives across hardware, software, manufacturing, and business functions. The role offers hands-on training, cross-functional collaboration, and career development in a hybrid work environment at their Malaysia facilities.
Listed on Intel’s careers site · Apply there ↗
Design Engineer
Broadcom Inc.
Full-time · Fort Collins, CO · $60,200 – $96,300
Join Broadcom's ASIC design team to work on physical implementation of high-performance custom silicon for AI and networking products, gaining hands-on experience with advanced process nodes and modern design tools. This role suits engineers with VLSI fundamentals who want exposure to the complete chip design cycle in a collaborative, learning-focused environment.
Listed on Broadcom Inc.’s careers site · Apply there ↗
Senior Technical Program Manager – VLSI
NVIDIA
Full-time · Santa Clara, CA · $168,000 – $322,000
NVIDIA seeks a senior program manager to oversee chip design and validation from architecture through production, coordinating schedules and dependencies across multiple engineering teams to accelerate silicon delivery. This role suits experienced technical program managers with deep semiconductor knowledge who can synthesize complex engineering data and influence senior stakeholders without direct authority.
Listed on NVIDIA’s careers site · Apply there ↗
CPU–SoC Mask Layout Designer (Diploma Level Contract role) - Silicon Engineering Group (SiG)
Intel
Contract
A diploma-level contract position for recent electrical engineering graduates to design and verify semiconductor mask layouts for Intel's CPU and SoC products, working alongside experienced engineers on real silicon design challenges. This role suits newly qualified engineers eager to build foundational skills in VLSI design while contributing to cutting-edge processor development.
Listed on Intel’s careers site · Apply there ↗
Senior Software Development Engineer, Neural Graph Infrastructure
NVIDIA
Santa Clara, CA · $168,000 – $310,500
NVIDIA is seeking a senior software engineer to design and build large-scale graph processing infrastructure for semiconductor CAD tools, using graph neural networks to handle trillion-edge datasets. The role combines architectural design with hands-on implementation, requiring someone comfortable bridging software engineering, machine learning, and EDA domain knowledge.
Listed on NVIDIA’s careers site · Apply there ↗
Graduate Talent (CPU-SoC Silicon Design)
Intel
Contract
This graduate-level role involves designing and validating next-generation CPU and system-on-chip architectures for Intel, covering RTL simulation, physical design implementation, analog IP development, and third-party IP integration. It suits recent engineering graduates ready to work on deep submicron silicon design with exposure to both digital and analog circuit design methodologies.
Listed on Intel’s careers site · Apply there ↗
Senior DFT Power Methodology Engineer
NVIDIA
Santa Clara, CA · $196,000 – $368,000
This role involves developing design-for-test power methodology for NVIDIA's datacenter GPUs, working on low-power solutions, thermal management, and post-silicon analysis. It suits senior chip design engineers with deep DFT and power expertise who enjoy solving complex semiconductor manufacturing challenges and mentoring others.
Listed on NVIDIA’s careers site · Apply there ↗
Senior USB IP Design Verification Engineer
Intel
Full-time
This role involves verifying USB IP designs at Intel to ensure they meet specifications and quality standards. It suits experienced engineers with strong knowledge of RTL verification methodologies, high-speed protocols, and the ability to collaborate across hardware design teams.
Listed on Intel’s careers site · Apply there ↗
Senior Manager, ASIC Chip Engineering
NVIDIA
Santa Clara, CA · $232,000 – $368,000
Lead the engineering and execution of next-generation system-on-chip processors across multiple product lines at a world-class semiconductor company. This role suits experienced chip managers who can orchestrate cross-functional teams through the entire development lifecycle and drive technical problem-solving in a complex, matrixed organization.
Listed on NVIDIA’s careers site · Apply there ↗
Asked for alongside Very Large Scale Integration (VLSI)
Measured from the 10 open roles that name Very Large Scale Integration (VLSI) — not from a curated list.