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Arrow Electronics

Full-time · San Jose, CA · $112,200 – $170,500

This role involves implementing Design-For-Test strategies on advanced networking chips, including scan insertion, pattern generation, and memory built-in self-test verification. It's suited for an experienced test engineer comfortable with industry-standard DFT tools and semiconductor design flows.

Listed on Arrow Electronics’s careers site · Apply there ↗

AeroVironment

Full-time · Albuquerque, NM · $88,500 – $135,000

This role involves designing and deploying firmware for space-based FPGA and embedded systems, working on high-reliability electronics for aerospace applications. It suits engineers with hardware description language experience who want to specialize in space technology and radiation-hardened system design.

Listed on AeroVironment’s careers site · Apply there ↗

Adtran

Adtran Huntsville HQ

A skilled technician supporting hardware and software engineers at a networking equipment company through assembly, testing, documentation, and design verification work. This role suits someone with electronics training and hands-on lab experience who can work independently across multiple engineering disciplines.

Listed on Adtran’s careers site · Apply there ↗

NVIDIA

Santa Clara, CA · $168,000 – $310,500

NVIDIA is hiring a senior engineer to architect and implement design-for-test solutions for their next-generation AI chips, working across the full silicon lifecycle from design through post-silicon validation. This role suits someone with deep DFT expertise and SoC design experience who enjoys mentoring others and collaborating across hardware and software teams.

Listed on NVIDIA’s careers site · Apply there ↗

Samsung Semiconductor

This role involves designing high-speed serial interface IP blocks at the RTL level for Samsung's semiconductor products, requiring deep expertise in protocols like USB, PCIe, and Ethernet. It suits mid-to-senior engineers with 8-11 years of experience who have shipped silicon and can mentor others while working across cross-functional teams.

Listed on Samsung Semiconductor’s careers site · Apply there ↗

Intel

Full-time · $220,920 – $311,890

This role leads formal verification strategy for Intel's AI chip designs, ensuring correctness through advanced formal methods and SystemVerilog assertions. It suits senior engineers with deep expertise in formal verification methodologies who can mentor others and drive sign-off on complex SoC blocks.

Listed on Intel’s careers site · Apply there ↗

Micron Technology

Richardson, TX

This role leads the physical design of Micron's high-bandwidth memory chips from initial schematic through final manufacturing data, owning placement, routing, timing closure, and power delivery across advanced process nodes. It suits experienced IC designers comfortable driving complex multi-team efforts in memory-centric designs and learning HBM-specific architecture if not already expert in it.

Listed on Micron Technology’s careers site · Apply there ↗

Broadcom Inc.

Full-time · Fort Collins, CO · $60,200 – $96,300

Join Broadcom's ASIC design team to work on physical implementation of high-performance custom silicon for AI and networking products, gaining hands-on experience with advanced process nodes and modern design tools. This role suits engineers with VLSI fundamentals who want exposure to the complete chip design cycle in a collaborative, learning-focused environment.

Listed on Broadcom Inc.’s careers site · Apply there ↗

Ambarella

US Headquarters · $140,000 – $156,000

This role involves designing and optimizing the physical layout of advanced AI processor chips, from initial floorplanning through final verification and tape-out. It suits engineers with several years of experience in digital chip design who want to work on cutting-edge low-power SoCs using industry-standard tools.

Listed on Ambarella’s careers site · Apply there ↗

Astranis

San Francisco, CA · $140,000 – $205,000

This role designs and verifies the FPGA logic that powers Astranis's satellite communications systems, working across radio, avionics, and ground infrastructure. It suits engineers with RTL experience who want to contribute to space technology at a company building production satellites.

Listed on Astranis’s careers site · Apply there ↗