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93 open listings · Page 2 of 4
Roles posted by organizations here, alongside roles we found on employers’ own careers sites. Crawled roles say so on the card and send you to the employer to apply. Only show organizations on Career App
Intercom
Full-time · San Francisco, CA · $142,000 – $162,000
Systems Engineer joining an AI-powered customer support company to design and maintain cloud-based IT infrastructure with emphasis on identity management, automation, and compliance. This role suits engineers transitioning from traditional infrastructure or DevOps into modern SaaS-based environments, or those with identity and lifecycle automation experience ready to scale their impact.
Listed on Intercom’s careers site · Apply there ↗
Baidu
Sunnyvale, CA
This role leads the design of memory architectures for Baidu's AI accelerator chips, focusing on creating unified memory systems that scale across thousands of processors. It suits experienced hardware architects comfortable with distributed systems, performance analysis, and cross-functional collaboration between software and silicon teams.
Listed on Baidu’s careers site · Apply there ↗
Arrow Electronics
Full-time
This is a senior FPGA design role requiring nearly a decade of experience with digital logic, EDA tools, and high-speed protocols like PCIe and AXI. The position suits someone with deep expertise in RTL design, timing analysis, and low-power design techniques who can work on-site at a semiconductor services company.
Listed on Arrow Electronics’s careers site · Apply there ↗
NVIDIA
Full-time · Santa Clara, CA · $184,000 – $287,500
This role develops the workflow platform that orchestrates NVIDIA's chip-design infrastructure, converting engineering specifications into automated, reliable production pipelines that handle dependencies, job execution, and validation across complex projects. It suits experienced systems engineers with strong Linux fundamentals and a track record of owning build, release, or HPC infrastructure at scale.
Listed on NVIDIA’s careers site · Apply there ↗
Samsung Semiconductor
Lead a team of STA engineers in semiconductor design, taking ownership of timing closure, synthesis, and physical design optimization for advanced chips. This role suits experienced ASIC design professionals who excel at both technical execution and mentoring, with deep expertise in constraints, low-power design, and high-speed timing closure.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
Intel
Full-time · $220,920 – $311,890
Lead functional verification strategy and execution for Intel's advanced system-on-chip designs, mentoring engineers while driving innovation across simulation, emulation, and formal verification methodologies. This role suits experienced verification engineers ready to influence Intel's technical direction and shape product quality at scale.
Listed on Intel’s careers site · Apply there ↗
Broadcom Inc.
Full-time · San Jose, CA · $143,800 – $230,000
This role leads the digital design of next-generation chips from architecture through tape-out, requiring deep expertise in RTL, synthesis, timing, and cross-team coordination. It suits experienced ASIC engineers ready to own a complete silicon project as the primary technical authority.
Listed on Broadcom Inc.’s careers site · Apply there ↗
LSEG
Saint Louis, MO
A senior-level software engineer role focused on building internal development tools and utilities for a major financial markets infrastructure company. The position suits experienced engineers who enjoy working across multiple technology stacks, collaborating with internal teams, and helping advance DevOps practices in a complex, regulated environment.
Listed on LSEG’s careers site · Apply there ↗
Boeing
Herndon, VA · $92,650 – $192,050
Boeing is hiring an audio-visual programmer to design and deploy Crestron-based systems for government clients, working across the full project lifecycle from requirements gathering through field commissioning. This role suits experienced A/V systems engineers who can translate customer needs into robust custom designs and manage complex integration projects.
Listed on Boeing’s careers site · Apply there ↗
Ambarella
US Headquarters · $195,000 – $226,000
Ambarella seeks an experienced VLSI designer to work on edge AI processor chips, focusing on video compression, image processing, and compute architectures across the full design stack from RTL to silicon. The role suits engineers who want visible impact on differentiated SoC designs rather than narrow functional blocks, with exposure to both micro-architecture decisions and real-world chip bring-up.
Listed on Ambarella’s careers site · Apply there ↗
Baidu
Sunnyvale, CA
This role involves architecting low-power subsystems for AI processors used in data centers and edge devices, optimizing for power efficiency and performance. It suits experienced hardware architects who can lead power design initiatives across the full stack from microarchitecture to system level.
Listed on Baidu’s careers site · Apply there ↗
Arrow Electronics
Full-time · US-MN-Minnesota (Remote Employees)
This role involves designing and building verification environments for semiconductor products using industry-standard methodologies and tools. It suits experienced engineers who excel at test automation and debugging complex hardware systems at the subsystem and system level.
Listed on Arrow Electronics’s careers site · Apply there ↗
Samsung Semiconductor
Samsung's R&D center in India seeks a Design Verification Engineer to develop and validate semiconductor IP blocks for high-speed interfaces and memory technologies. This role suits engineers with 4–8 years of experience who want to work on cutting-edge foundry IP and use modern verification methodologies at scale.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
NVIDIA
Full-time · Austin, TX · $116,000 – $189,750
NVIDIA is hiring an ASIC Design Engineer to develop system-level methodologies and RTL for measuring performance across GPU and SOC projects. This role suits engineers with RTL design experience who want to work on performance monitoring systems and collaborate across hardware and software teams.
Listed on NVIDIA’s careers site · Apply there ↗
Intel
Full-time · $141,910 – $269,100
Intel is seeking an experienced engineer to design and optimize the logic for their next-generation CPU processors, writing RTL code and managing the simulation and verification of processor architectures. This role suits someone with 5+ years of RTL design experience who wants to work on cutting-edge processor technology at a company scale.
Listed on Intel’s careers site · Apply there ↗
Broadcom Inc.
3 locations · $143,800 – $230,000
Broadcom seeks a Physical Design Engineer to lead chip floorplanning and physical implementation from RTL through silicon tape-out, focusing on next-generation AI and PCIe Switch products. This role suits senior engineers with deep expertise in top-level floorplanning, clock trees, and cross-functional coordination across design, package, and methodology teams.
Listed on Broadcom Inc.’s careers site · Apply there ↗
LSEG
This role develops real-time financial data libraries in Java for a major financial infrastructure company, requiring strong network programming skills and the ability to work independently on high-quality software solutions. It suits experienced Java engineers with a background in low-level networking who thrive in collaborative teams using modern development practices.
Listed on LSEG’s careers site · Apply there ↗
Baidu
Sunnyvale, CA
This role designs and optimizes CPU and processor architectures for AI hardware, working across microarchitecture, memory systems, and system-level performance. It suits architects with deep expertise in processor design, power optimization, and a track record shipping silicon improvements.
Listed on Baidu’s careers site · Apply there ↗
Arrow Electronics
Full-time · San Jose, CA
This role focuses on verifying digital hardware designs using industry-standard languages and methodologies, working with teams to ensure silicon meets specifications before manufacturing. It suits experienced engineers who have built testbenches from scratch and debugged complex systems through simulation.
Listed on Arrow Electronics’s careers site · Apply there ↗
Samsung Semiconductor
Samsung is seeking a design verification engineer to build and enhance test environments for memory semiconductor products, working with industry-standard verification methodologies. This role suits experienced engineers who are comfortable debugging complex systems independently while collaborating closely with design teams.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
NVIDIA
Full-time · Santa Clara, CA · $136,000 – $264,500
This role involves managing failure analysis and root-cause investigations for NVIDIA's AI and ML hardware products, working with both internal teams and manufacturing partners to improve quality and reliability. It suits experienced systems engineers with hands-on lab expertise and a background in hardware testing and failure analysis.
Listed on NVIDIA’s careers site · Apply there ↗
Intel
Full-time · Hillsboro, OR · $149,600 – $284,580
This role develops electrostatic discharge verification rule sets and methodologies for Intel's most advanced semiconductor process technologies, enabling design teams to deliver products faster. It suits engineers with strong physical design verification backgrounds who want to solve complex reliability challenges at the cutting edge of semiconductor manufacturing.
Listed on Intel’s careers site · Apply there ↗
Broadcom Inc.
This role develops behavioral models of analog circuit blocks in SystemVerilog for chip verification, bridging the analog design and digital verification teams. It suits engineers with strong analog circuit knowledge who can code detailed mixed-signal simulations and validate them against schematics.
Listed on Broadcom Inc.’s careers site · Apply there ↗
Arrow Electronics
Full-time · San Jose, CA · $95,900 – $170,500
This role involves designing and implementing Design For Test solutions for advanced networking chips at 3nm and 5nm nodes, working with industry-standard tools like Tessent and Tetramax to develop test patterns, verify memory and JTAG functionality, and automate DFT flows through scripting. It suits experienced DFT engineers who have worked on complex SoCs and want to apply their expertise in semiconductor test methodology at a large global company.
Listed on Arrow Electronics’s careers site · Apply there ↗
NVIDIA
Full-time · Santa Clara, CA · $136,000 – $218,500
NVIDIA seeks a senior engineer to develop behavioral models and verification for custom mixed-signal design cells used across their GPU and ASIC products, using hardware description languages and scripting to ensure performance and power efficiency. This role bridges circuit and digital design, requiring hands-on RTL simulation expertise and collaboration with cross-functional teams.
Listed on NVIDIA’s careers site · Apply there ↗