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Listed on Baidu’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role leads the design of memory architectures for Baidu's AI accelerator chips, focusing on creating unified memory systems that scale across thousands of processors. It suits experienced hardware architects comfortable with distributed systems, performance analysis, and cross-functional collaboration between software and silicon teams.
Our summary, not Baidu’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- 10+ years in silicon architecture or IP design with memory subsystem focus
- Understanding of distributed AI training system requirements on SoC memory
- Hardware digital design experience with CPUs, accelerators, or peripherals
- Familiarity with software and operating system memory practices
- System performance analysis and debug in pre- and post-silicon environments
- Knowledge of system interconnect, MMUs, caches, and memory technologies
- Master's or PhD in Electrical or Computer Engineering
- English and Mandarin Chinese fluency
Nice to have
- Experience with data analysis tools