Occupation
Pysical Design Engineer
Physical Design Engineers translate high-level chip designs into the physical layouts that semiconductor manufacturers fabricate, working through the RTL-to-GDS flow using electronic design automation (EDA) tools to handle placement, routing, timing closure, and power optimization. The work involves collaborating with RTL designers and architects to solve implementation challenges on increasingly complex silicon at advanced process nodes, using tools like Cadence and Synopsys to verify designs meet timing, power, and area targets before tape-out. The role suits engineers with formal training in electrical or computer engineering and several years of hands-on experience in place-and-route, physical verification, and the constraints of modern chip manufacturing.
Duties & responsibilities
- Execute synthesis, place-and-route, and timing analysis for ASIC chip partitions
- Optimize physical layouts and floorplans from initial design through tape-out
- Perform timing closure and convergence to meet performance and power targets
- Conduct physical verification and design rule checks on chip layouts
- Collaborate with RTL designers and architects to resolve implementation challenges
- Use EDA tools to manage placement, routing, and signal integrity across advanced process nodes
What Pysical Design Engineer roles involve, from employers’ own postings.
How much does a Pysical Design Engineer make?
Too few Pysical Design Engineer postings state pay to publish a median yet: 2 of 4 open roles do, and we wait for 25.
Who is hiring for Pysical Design Engineer roles?
4 open Pysical Design Engineer roles from 2 employers.
From employers’ own postings, as of.
Pysical Design Engineer in the job market
Last checked October 28, 2026
- Open roles
- 4
- Employers
- 2
- Median pay
- —
- Disclose pay
- —
on Career App right now
hiring for it
not enough disclosed
of these roles
Open Pysical Design Engineer roles (4)
Senior Physical Design Engineer
Arrow Electronics
Full-time
This role designs physical layouts and chip architectures for semiconductor products at a company in Bangalore. It suits experienced chip design engineers ready to lead technical work on complex microelectronics projects.
Listed on Arrow Electronics’s careers site · Apply there ↗
Physical Design Engineer
Ambarella
US Headquarters · $140,000 – $156,000
This role involves designing and optimizing the physical layout of advanced AI processor chips, from initial floorplanning through final verification and tape-out. It suits engineers with several years of experience in digital chip design who want to work on cutting-edge low-power SoCs using industry-standard tools.
Listed on Ambarella’s careers site · Apply there ↗
Physical Design Engineer II (eInfochips Inc)
Arrow Electronics
Full-time · San Jose, CA
This role executes the physical design and place-and-route phases of ASIC chip development, collaborating with RTL and architecture teams to meet timing and power targets through the full implementation flow. It suits engineers with 7+ years of hands-on EDA tool experience who want to work on advanced-node chip design at scale.
Listed on Arrow Electronics’s careers site · Apply there ↗
Physical Design Engineer (Einfochips Inc)
Arrow Electronics
Full-time · $87,400 – $165,000
A physical design engineer needed to execute synthesis, place-and-route, and timing analysis for ASIC chip partitions while collaborating with architects and RTL designers to resolve implementation challenges. This role suits engineers with deep expertise in EDA tools and advanced node technologies who can manage tight schedules and drive design convergence.
Listed on Arrow Electronics’s careers site · Apply there ↗