59 open listings · Page 2 of 3
Roles posted by organizations here, alongside roles we found on employers’ own careers sites. Crawled roles say so on the card and send you to the employer to apply. Only show organizations on Career App
Apply for Senior Design Verification Engineer at Juniper Networks on their site
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Senior Design Verification Engineer
Juniper Networks
Sunnyvale, CA
Listed on Juniper Networks’s careers site · Apply there ↗
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Design Verification Engineer(eInfochips Inc)
Arrow Electronics
Full-time · San Jose, CA · $95,900 – $149,600
This role involves leading hardware verification efforts for complex semiconductor designs, requiring expertise in SystemVerilog and modern protocol verification. It suits experienced engineers who can independently drive verification projects while mentoring junior team members and collaborating with clients.
Listed on Arrow Electronics’s careers site · Apply there ↗
Senior GPU Design Verification Engineer (GCDV)
Samsung Semiconductor
Full-time · $124,000 – $208,400
Samsung is seeking a senior GPU verification engineer to develop and execute verification strategies for their next-generation mobile GPU, ensuring functional correctness and performance integrity. This role suits someone with semiconductor verification experience who thrives in collaborative global teams and enjoys tackling complex validation challenges across graphics pipelines.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
Apply for Design Verification Engineer at Intel on their site
Design Verification Engineer
Intel
Santa Clara, CA
Listed on Intel’s careers site · Apply there ↗
Verification Engineer
Broadcom Inc.
2 locations
Listed on Broadcom Inc.’s careers site · Apply there ↗
Choose a location to apply
Apply for Senior ASIC Verification Engineer - HSIO at NVIDIA on their site
Senior ASIC Verification Engineer - HSIO
NVIDIA
Listed on NVIDIA’s careers site · Apply there ↗
Apply for ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal) at Boeing on their site
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ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal)
Boeing
Albuquerque, NM
Listed on Boeing’s careers site · Apply there ↗
Apply for Principal Analog Verification Engineer at Micron Technology on their site
Principal Analog Verification Engineer
Micron Technology
Boise, ID
Listed on Micron Technology’s careers site · Apply there ↗
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ASIC Verification Engineer
Juniper Networks
2 locations
Listed on Juniper Networks’s careers site · Apply there ↗
Choose a location to apply
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Design Verification Engineer (Einfochips)
Arrow Electronics
Full-time · San Jose, CA
This role focuses on verifying digital hardware designs using industry-standard languages and methodologies, working with teams to ensure silicon meets specifications before manufacturing. It suits experienced engineers who have built testbenches from scratch and debugged complex systems through simulation.
Listed on Arrow Electronics’s careers site · Apply there ↗
GPU Design Verification Engineer (GCDV)
Samsung Semiconductor
Full-time · $180,200 – $297,200
Samsung is hiring a senior verification engineer to ensure their mobile GPU designs work correctly across the entire graphics pipeline, from input rendering through pixel processing. This role suits someone with deep graphics architecture knowledge and 11–15+ years of chip design verification experience who wants to see their work ship in millions of consumer devices.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
Senior USB IP Design Verification Engineer
Intel
Full-time
This role involves verifying USB IP designs at Intel to ensure they meet specifications and quality standards. It suits experienced engineers with strong knowledge of RTL verification methodologies, high-speed protocols, and the ability to collaborate across hardware design teams.
Listed on Intel’s careers site · Apply there ↗
ASIC Verification Engineer
Broadcom Inc.
2 locations · $101,000 – $162,000
This role develops verification environments and testbenches for high-speed communication ASICs, particularly Ethernet PHYs used in data center and networking products. It suits engineers with 3–5 years of HDL and verification experience who want to deepen their expertise in protocol validation and chip-level testing.
Listed on Broadcom Inc.’s careers site · Apply there ↗
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Apply for Senior Design Verification Engineer - PCIE at NVIDIA on their site
Senior Design Verification Engineer - PCIE
NVIDIA
Listed on NVIDIA’s careers site · Apply there ↗
Apply for ASIC / FPGA Design Verification Engineer - (Associate or Experienced) at Boeing on their site
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ASIC / FPGA Design Verification Engineer - (Associate or Experienced)
Boeing
Listed on Boeing’s careers site · Apply there ↗
Apply for Principal Design Verification Engineer, HBM at Micron Technology on their site
Principal Design Verification Engineer, HBM
Micron Technology
Richardson, TX
Listed on Micron Technology’s careers site · Apply there ↗
Design Verification Engineer, Coherent Interconnect
Samsung Semiconductor
Full-time · $151,000 – $251,800
Samsung is seeking a verification engineer to develop and maintain testbenches for their coherent interconnect IP blocks, working with SystemVerilog and UVM to ensure correct functionality across block and system levels. This role suits someone with deep design verification expertise who wants to contribute to high-performance computing systems used in consumer mobile devices.
Listed on Samsung Semiconductor’s careers site · Apply there ↗
Senior Design Verification Engineer
Intel
Santa Clara, CA · $164,470 – $311,890
Intel seeks a senior-level verification engineer to lead the validation of critical chip interconnect and memory subsystems, working across architecture, design, and software teams. The role demands deep expertise in verification methodologies and protocol standards, with the breadth to contribute across traditional engineering disciplines and adopt AI-assisted development practices.
Listed on Intel’s careers site · Apply there ↗
Design Verification Engineer
Broadcom Inc.
4 locations · $143,800 – $230,000
Broadcom's ASIC division seeks a verification engineer to design and validate complex digital and mixed-signal IP blocks, from initial planning through coverage closure and debug. This role suits someone with deep SystemVerilog and UVM expertise who can architect reusable verification environments and work across block, system, and ASIC levels.
Listed on Broadcom Inc.’s careers site · Apply there ↗
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Apply for Senior Chip Design Verification Engineer at NVIDIA on their site
Senior Chip Design Verification Engineer
NVIDIA
Listed on NVIDIA’s careers site · Apply there ↗
Apply for Software Test & Verification Engineer (Experienced or Senior) at Boeing on their site
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Software Test & Verification Engineer (Experienced or Senior)
Boeing
Listed on Boeing’s careers site · Apply there ↗
CPU Verification Engineer
Intel
Full-time · 2 locations · $105,650 – $200,340
Intel is hiring a CPU verification engineer to validate the functional correctness and performance of next-generation ATOM processors. The role suits experienced hardware engineers who enjoy developing testbenches, debugging complex systems, and collaborating across architecture and design teams to ship power-efficient processors.
Listed on Intel’s careers site · Apply there ↗
Choose a location to apply
ASIC Design Verification Engineer
Micron Technology
Minneapolis, MN
Design verification engineer role focused on developing and maintaining UVM-based simulation environments for advanced semiconductor systems, involving constrained random testing, coverage analysis, and debugging of complex functional issues. Suits experienced verification engineers interested in working on sophisticated SOC designs and exploring AI-assisted verification techniques.
Listed on Micron Technology’s careers site · Apply there ↗
Apply for GPU Verification Engineer at NVIDIA on their site
GPU Verification Engineer
NVIDIA
Westford, MA
Listed on NVIDIA’s careers site · Apply there ↗
Physical Verification Engineer
Intel
Full-time · $128,880 – $245,160
This role supports Intel's foundry customers with advanced semiconductor layout verification and parasitic extraction challenges, focusing on aerospace and defense applications. It suits experienced engineers who can provide technical leadership, develop verification methodologies, and guide customers through complex physical design problems on cutting-edge process nodes.
Listed on Intel’s careers site · Apply there ↗