$101,000 – $162,000
Listed on Broadcom Inc.’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role develops verification environments and testbenches for high-speed communication ASICs, particularly Ethernet PHYs used in data center and networking products. It suits engineers with 3–5 years of HDL and verification experience who want to deepen their expertise in protocol validation and chip-level testing.
Our summary, not Broadcom Inc.’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- Bachelor's degree in Engineering plus 5+ years related experience, or Master's degree plus 3+ years, or PhD
- Design or verification experience
- Logic design and electronic circuit design background
- Proficiency in Verilog, SystemVerilog, or VHDL
Nice to have
- C/C++ programming and object-oriented programming experience
- Scripting proficiency in Python, Perl, or TCL