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NVIDIA

Senior DFT Power Methodology Engineer

NVIDIA

Santa Clara, CA · full time · Senior

$168,000 – $310,500

Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.

What this role is

This role involves developing design-for-test power methodologies and enabling advanced AI techniques to optimize thermal management and quality for NVIDIA's next-generation datacenter GPUs. You'll partner across teams to solve complex semiconductor manufacturing challenges while mentoring junior engineers on test design trade-offs.

Our summary, not NVIDIA’s wording. The full posting is on their site.

Skills this role names

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What they ask for

Required

  • BSEE with 12+ years experience in DFT and power, or MSEE with 10+ years, or PhD with 6+ years
  • Fundamental DFT and VLSI knowledge in power, timing, and voltage noise
  • Power, thermal, and voltage noise analysis experience
  • Statistical tools expertise for data analysis
  • Exposure to RTL, clocks, STA, place-and-route, and power design areas
  • Silicon debug and bring-up experience on ATE or SLT platforms
  • Ability to think programmatically for AI-based solutions

Nice to have

  • Power Analysis, Thermal Analysis, and IR Drop tools experience
  • AI application for EDA problem-solving
  • DFT Power Methodology management experience
  • Post-silicon debug experience for thermal and IR Drop
  • Technology understanding and passion for the domain

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