Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role leads automated test pattern generation and design-for-test implementations on NVIDIA's most advanced semiconductor chips, requiring deep expertise in ATPG tools and flows. It suits experienced hardware engineers who want to own complex testing solutions end-to-end across design, verification, and silicon validation.
Our summary, not NVIDIA’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- 3+ years hands-on DFT and ATPG experience
- Strong programming in scripting languages
- BSc in Electrical Engineering or Computer Engineering
Nice to have
- Knowledge of scan, BIST, on-chip scan compression, fault models, and fault simulation
- Experience with Mentor TestKompress ATPG tool and retargeting flow
- Proficiency in TCL, Perl, Python, and Unix shell scripts
- ATE and silicon bring-up experience