Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
NVIDIA seeks a Senior ASIC engineer to lead chip-level design integration across their System-On-Chip group, collaborating with multiple teams on complex networking chip architecture, design automation, and quality optimization. This role suits experienced RTL designers passionate about SOC design methodologies and solving structural challenges in advanced chip design.
Our summary, not NVIDIA’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- B.S. or M.S. in Electrical Engineering or Computer Engineering
- 7+ years of chip design experience
- Hands-on RTL design in SystemVerilog
- Proficiency in Python, Bash, or Tcl
Nice to have
- Experience delivering designs to physical design, emulation, or firmware teams
- Passion for design quality and optimization