$151,000 – $226,600
Listed on Samsung Semiconductor’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
Design power management RTL blocks for Samsung's next-generation mobile GPU architectures, working as a mid-to-senior engineer who translates microarchitectural specifications into synthesizable hardware and collaborates across hardware, software, and SoC teams. This role suits someone with deep RTL expertise and low-power design experience who enjoys the full lifecycle from architecture through production validation.
Our summary, not Samsung Semiconductor’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- 6+ years of experience with a Bachelor's degree in Computer Science or Engineering, or 4+ years with a Master's degree, or 2+ years with a Ph.D.
- 4+ years of hands-on power management or low-power microarchitecture design for complex SoC, CPU, or GPU
- Hands-on RTL design in Verilog/SystemVerilog including microarchitecture development, integration, and debug
- Working knowledge of GPU or high-performance digital design power management including IP power sequence, clock/reset control, clock domain crossing, and DVFS
- Familiarity with low-power intent design for multi-voltage domain systems
- Proficiency with Python or Perl scripting
- Strong analytical and problem-solving skills
- Excellent written and verbal communication skills for technical documentation
- Strong collaboration skills in a fast-paced global team environment
Nice to have
- Familiarity with power management or boot sequence firmware of GPU or CPU