$136,000 – $264,500
Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
NVIDIA is seeking experienced physical design engineers to lead the design and implementation of networking silicon chips, from RTL through production tape-out. This role suits engineers with deep expertise in advanced node physical design who can drive complex chip development workflows and mentor a team through the full design cycle.
Our summary, not NVIDIA’s wording. The full posting is on their site.
Skills this role names
Log in to see which of these are already on your profile.
What they ask for
Required
- BSEE or MSEE degree, or equivalent experience
- 5+ years in VLSI physical design on 5nm, 4nm, and 3nm process nodes
- Track record of delivering designs to production
- Expert-level proficiency with Synopsys tools (ICC2, DC, PT, STAR, ICV) and Cadence tools (Genus, Innovus, Tempus)
- Experience with timing closure, clock and power distribution, place and route, and tapeout
- Strong analytical and debugging skills
Nice to have
- Experience assisting in design flow development and debugging
- Application of ML/AI solutions to design challenges
- Proficiency with Python, Perl, Tcl, or Make scripting