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Intel

Senior Design Verification Engineer

Intel

Santa Clara, CA · Senior

$164,470 – $311,890

Listed on Intel’s own careers site. You apply with them directly — we never stand between you and the employer.

What this role is

Intel seeks a senior-level verification engineer to lead the validation of critical chip interconnect and memory subsystems, working across architecture, design, and software teams. The role demands deep expertise in verification methodologies and protocol standards, with the breadth to contribute across traditional engineering disciplines and adopt AI-assisted development practices.

Our summary, not Intel’s wording. The full posting is on their site.

Skills this role names

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What they ask for

Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM field
  • 10+ years of design verification experience
  • Extensive IP-level, subsystem, and SoC-level verification background
  • Experience with interconnects, caches, and memory subsystems
  • Knowledge of AMBA, PCIe, UCIe, and CXL protocols
  • Understanding of cache coherency and memory consistency models
  • Verification of debug, trace, clock, power management, RAS, QoS, and security features
  • Simulation and formal verification methodologies
  • Low-power verification techniques
  • Proficiency with industry-standard EDA tools
  • Hands-on coding in SystemVerilog, UVM, C/C++, and Python
  • Experience with RTL, physical design, and CAD tool flows

Nice to have

  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM field
  • Experience with JasperGold, VC Formal, or similar formal verification tools
  • Emulation or FPGA-based verification background
  • Track record combining formal and simulation verification
  • Experience with system IPs such as MMUs and interrupt controllers
  • Knowledge of associated software stacks

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