$149,600 – $211,200
Listed on Intel’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
A mid-level software engineer will build and own key subsystems for Intel's chassis automation tool, which translates high-level SoC infrastructure requirements into RTL, register definitions, and verification collateral. The role suits someone comfortable with full-stack tool development who wants to influence next-generation chip architectures from the ground up.
Our summary, not Intel’s wording. The full posting is on their site.
Skills this role names
- CI/CD
- Electron Framework
- Git
- Integration Testing
- JSON
- Object Oriented Design
- Python
- React
- SystemVerilog
- Tai Chi
- Unit Testing
- Verilog
- YAML
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What they ask for
Required
- Bachelor's degree in Electrical Engineering, Computer Science, or related field with 4+ years CAD/EDA tooling or design automation experience, or Master's degree with 3+ years experience
- 3+ years Python or similar language with hands-on software systems and frameworks development including packaging, testing, and CLI tools
- Experience designing and validating structured schemas using JSON or YAML
- Knowledge of version control (Git), code reviews, unit/integration testing, and CI/CD practices
Nice to have
- Understanding of digital SoC design concepts including RTL hierarchy, synthesis flows, and parameterized IP design
- Working knowledge of SystemVerilog to understand and validate generated outputs
- Experience with Network-on-Chip architectures or high-performance interconnect protocols such as AXI, CHI, PCIe, UCIe
- Familiarity with IP packaging, configuration, and integration methodologies including IP-XACT
- Exposure to industry EDA tools and design flows
- Knowledge of graph-based algorithms or data structures for topology generation, connectivity modeling, or routing
- Experience with GUI development using Qt/QML, React, Electron or similar frameworks
- Strong understanding of object-oriented design, design patterns, and software architecture principles