$168,000 – $310,500
Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
NVIDIA seeks a senior chip design engineer to architect and implement network-on-chip and interconnect components for their processors and GPUs, working across verification, synthesis, and physical design to deliver production-ready silicon.
Our summary, not NVIDIA’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- Bachelor's or Master's degree in Electrical Engineering or Computer Engineering (or equivalent)
- 8+ years of RTL/build experience on complex interconnect or memory system units
- Proficiency in Verilog and/or SystemVerilog
- Deep understanding of ASIC flow including RTL, verification, synthesis, timing, ECO, and post-silicon debug
- Experience with arbiters, scheduling, synchronization, bus protocols, and interconnect networks
Nice to have
- Familiarity with arbitration policies, interconnection routing, deadlock avoidance, and virtual channels
- Strong debugging and analytical skills