$168,000 – $310,500
Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role leads silicon validation for NVIDIA's high-speed interfaces like PCIe and NVLink, debugging across the full stack from protocol behavior through firmware and hardware to resolve critical failures before production. The position suits engineers who combine deep protocol expertise with hands-on lab skills and the judgment to navigate complex system-level problems under schedule pressure.
Our summary, not NVIDIA’s wording. The full posting is on their site.
What they ask for
Required
- BS or MS in Electrical Engineering, Computer Engineering, or Systems Engineering, or equivalent lab experience
- 8+ years in silicon validation, HSIO bring-up, or high-speed interface debug on real hardware
- Deep protocol expertise in PCIe, NVLink, CXL, C2C, Ethernet, USB, or similar high-speed interface technologies
- Signal integrity fundamentals including SERDES behavior, link training, equalization, clocking, reset, and power management
- Hands-on lab experience with oscilloscopes, BERTs, protocol analyzers, logic analyzers, and silicon debug tools
- Ability to debug across hardware, firmware, drivers, and platform design without losing the thread
- Statistical proficiency to recognize patterns in marginal distributions
Nice to have
- Recognized depth in PCIe, NVLink, CXL, or advanced SERDES validation with a track record of solving failures others brought to you
- Experience building or deploying AI-driven flows for HSIO debug or failure triage
- Track record of solving customer-critical or production-blocking HSIO failures under schedule pressure
- Experience setting technical direction across a validation organization or developing engineers into subsystem experts