Occupation

Design Verification Architect

A Design Verification Architect develops and oversees verification strategies and testbenches for semiconductor chip designs before manufacturing, using methodologies like UVM (Universal Verification Methodology) and formal verification to identify and prevent design flaws early in the development cycle. The role involves designing simulation environments, creating test scenarios, and establishing verification processes across complex hardware projects, often collaborating with design teams and junior verification engineers. This position suits experienced hardware verification engineers with strong expertise in simulation tools, programming languages like SystemVerilog, and system-level validation who are ready to move into leadership of verification methodology.

Open Design Verification Architect roles (1)

Design Verification Architect

Intel

Full-time · Folsom, CA · $164,470 – $232,190

This role architects verification strategies and testbenches for semiconductor pre-silicon validation, developing UVM and formal verification approaches to catch design issues before fabrication. It suits experienced hardware verification engineers with deep expertise in simulation tools and system-level validation who want to shape verification methodology across complex chip designs.

Listed on Intel’s careers site · Apply there ↗

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