Listed on Samsung Semiconductor’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role leads a team of RTL designers at Samsung's India R&D center, focusing on SoC subsystem and IP design across high-speed and low-speed protocols. It suits experienced chip design engineers ready to move into technical leadership and work on cutting-edge semiconductor technologies for mobile, AI, and 5G applications.
Our summary, not Samsung Semiconductor’s wording. The full posting is on their site.
What they ask for
Required
- 9 to 12 years of SoC IP and subsystem design experience
- Experience with high-speed and low-speed protocol concepts
- Knowledge of SPI, I2C, I3C, UART, and PWM IP design
- Team management experience leading 4-5 engineers
- Architectural design experience at block and subsystem level
- Understanding of interconnect protocols (AXI, AHB, APB)
- Knowledge of design verification tools and flows (Lint, CDC, UPF, DFT)
- Design timing closure and verification expertise
- SoC dependency management and front-end task planning
- Effective communication and leadership skills
- Bachelor's or Master's degree in engineering
Nice to have
- Experience with UCIe, Ethernet, or UFS IP design
- Experience with Host Controller, Unipro, or MPHY architecture