Listed on Micron Technology’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role leads the design of advanced semiconductor packages for memory products used in AI, data centers, and mobile applications, from initial concept through manufacturing. It suits experienced package engineers who want to influence product architecture across silicon, system integration, and high-volume production at a major semiconductor company.
Our summary, not Micron Technology’s wording. The full posting is on their site.
What they ask for
Required
- Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, or related field plus 5 years of semiconductor package design experience, OR Master's degree in those fields plus 3 years of experience
- Hands-on proficiency with Cadence Allegro Package Designer+, Cadence Integrity 3D-IC, or Siemens/Mentor Xpedition
- Experience with flip chip and wire bond interconnects, BEOL/RDL flows, and substrate stack-ups
- Experience with high-density routing
- Partnership experience with Signal Integrity and Power Integrity simulation teams
- Experience collaborating with OSAT partners or assembly engineering organizations
Nice to have
- 7+ years of proven experience with advanced DRAM technologies such as LPDDR, HBM, or GDDR
- Experience with TSV stacking, micro-bump layout, and Chip-Package Interaction analysis
- Familiarity with 2.5D/3D-IC, Fan-Out Wafer Level Packaging, and System-in-Package
- Experience defining Assembly DOEs and DFMEA reviews in HVM environments
- Proficiency with AutoCAD or Autodesk Mechanical for package and interposer drawings
- Experience leading co-design engagements and silicon floorplan optimization
- Experience and/or interest in developing Agentic AI workflows into current or future processes