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NVIDIA

ASIC Design Engineer

NVIDIA

Santa Clara, CA · full time · Mid

$116,000 – $189,750

Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.

What this role is

This role involves designing high-performance, power-efficient hardware building blocks (RTL) for GPUs and SoCs used in AI, graphics, and autonomous systems. It suits engineers with 2+ years of digital design experience who are comfortable with Verilog, synthesis flows, and collaborating across large verification and silicon teams.

Our summary, not NVIDIA’s wording. The full posting is on their site.

Skills this role names

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What they ask for

Required

  • BS or MS in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent experience
  • 2+ years of RTL design experience
  • Proficiency in Verilog and front-end design flows (synthesis, power, timing)
  • Knowledge of digital systems, VLSI design, computer architecture, and computer arithmetic
  • Coding skills in Perl, Python, or similar scripting languages
  • Strong teamwork and interpersonal skills

Nice to have

  • C/C++ programming skills
  • Experience with multi-clock domains and asynchronous logic
  • Knowledge of interface protocols and arbitration schemes
  • Strong debugging and analytical problem-solving abilities

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