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NVIDIA

Senior Physical Design Methodology Engineer, PPA Fusion Compiler

NVIDIA

full time · Senior

$168,000 – $310,500

Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.

What this role is

NVIDIA is seeking a Senior Physical Design Methodology Engineer to develop advanced physical design methodologies and machine learning-based solutions for their high-performance GPU and system-on-chip designs. This role suits experienced chip design professionals with expertise in place-and-route, timing closure, and power/performance optimization who want to work on cutting-edge computing hardware.

Our summary, not NVIDIA’s wording. The full posting is on their site.

Skills this role names

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What they ask for

Required

  • Master's degree in Electrical Engineering, Computer Engineering, or Computer Science (or equivalent experience)
  • 10+ years of physical design engineering experience
  • Proven implementation of ML-based solutions in chip design
  • Experience with floorplanning, clock and power distribution, place and route, integration and verification
  • Knowledge of timing and electromagnetic convergence with power integrity
  • Hierarchical design approach and top-down design methodology
  • Experience with design for yield, manufacturability, EM and IR closure, and thermal management
  • Proficiency with industry standard place-and-route and analysis tools
  • Capability to write extensive scripts for PPA analysis and improvement

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