$168,000 – $310,500
Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role owns design-for-test methodology across NVIDIA's semiconductor products, architecting test solutions and verification strategies for next-generation chips while mentoring junior engineers. It suits experienced RTL and verification engineers who want to shape testing strategy on some of the industry's most complex designs.
Our summary, not NVIDIA’s wording. The full posting is on their site.
Skills this role names
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What they ask for
Required
- Master's degree in Electrical Engineering or equivalent experience
- 10+ years in SoC architecture, RTL design, and verification
- Analytical skills in test pattern and logic verification on complex multi-million gate designs
- Silicon debug and bring-up experience with ATE, pattern formats, and test program development
- Cross-functional knowledge of RTL, clocks, STA, place-and-route, and power trade-offs
Nice to have
- DFT security knowledge
- Hardware system security experience