$196,000 – $310,500
Listed on NVIDIA’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This role involves owning the full lifecycle of high-bandwidth memory (HBM) and low-power DDR (LPDDR) integration in NVIDIA's next-generation system-on-chips, from silicon bringup through production. You'll solve complex memory system challenges across electrical, physical, and software domains, working across design, packaging, firmware, and validation teams to ensure memory subsystems meet performance, power, and reliability targets.
Our summary, not NVIDIA’s wording. The full posting is on their site.
What they ask for
Required
- Bachelor's or Master's degree in Electrical Engineering or Computer Engineering, or equivalent experience
- 12+ years of hands-on experience in HBM, LPDDR, or high-speed memory systems including silicon bringup, characterization, and debug at scale
- Deep expertise in signal integrity, power integrity, timing analysis, margining, and memory training behavior
- Ability to work across design, package, firmware, validation, and product teams
Nice to have
- PHY controller development experience
- HBM3/HBM3E specifics
- JEDEC margin knowledge
- Thermal-electrical co-simulation experience
- ECC methodology expertise
- Power management experience
- Experience with AI-assisted debug tools and ML models for pattern matching
- Test automation and intelligent validation experience
- LLM-assisted architecture and trade-off analysis experience