$108,000 – $172,800
Listed on Broadcom Inc.’s own careers site. You apply with them directly — we never stand between you and the employer.
What this role is
This is an ASIC physical design role requiring expertise across synthesis, place and route, timing, power, and signal integrity to drive large complex chip implementations to closure. It suits experienced engineers who can lead multiple design disciplines and work independently on cutting-edge technology nodes.
Our summary, not Broadcom Inc.’s wording. The full posting is on their site.
What they ask for
Required
- Bachelor's degree in Electrical Engineering or related field with 8+ years of experience, or Master's degree with 6+ years of experience
- Expertise in synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, and signal integrity
- Proficiency with multiple EDA vendor solutions
- Ability to lead one or more design disciplines to closure
- Work effectively across distributed teams