# Vivado

Skill · Engineering (Mechanical, Electrical, Civil and Environmental)

Canonical page: https://career.thegoodapps.co/skills/vivado

Vivado is a design suite from AMD (formerly Xilinx) used to synthesize, simulate, and implement designs for FPGAs and programmable SoCs. Hardware and digital logic engineers use it to write and debug HDL code (Verilog/VHDL), run timing analysis, and generate bitstreams for programming Xilinx FPGA chips. It replaced Xilinx's older ISE toolchain and supports high-level synthesis from C/C++ as well.

## Roles that use Vivado

- [FPGA Engineer](https://career.thegoodapps.co/occupations/fpga-engineer) — 1

Related skills: [Verilog](https://career.thegoodapps.co/skills/verilog), [VHDL](https://career.thegoodapps.co/skills/vhdl)

## Open roles requiring Vivado (1)

- [FPGA Engineer](https://job-boards.greenhouse.io/astranis/jobs/4325685006) at [Astranis](https://career.thegoodapps.co/organizations/astranis) — San Francisco, CA, $140,000 – $205,000 (listed on Astranis's own careers site)