# RTL Design Lead Engineer

Hiring organization: [Samsung Semiconductor](https://career.thegoodapps.co/organizations/samsung-semiconductor)

Canonical page: https://career.thegoodapps.co/jobs/de84ecae-3924-4ad7-9333-c5013c397e10

Listed on Samsung Semiconductor's own careers site. Applications go to them directly.

- Seniority: Senior

## Summary

Samsung is seeking a design leader to manage the development of storage controller IP blocks for next-generation semiconductor products, overseeing architecture, RTL coding, and cross-functional collaboration from conception through synthesis and optimization. This role suits experienced hardware engineers who thrive leading complex projects involving cutting-edge storage standards and can mentor teams across verification, validation, and physical design.

_Our summary, not Samsung Semiconductor's wording._

## Skills named

Azure Resource Manager (ARM), FPGA, SystemVerilog, Verilog, VHDL

## Required

- 14–20 years of experience in RTL design and IP development
- Project management experience with complex semiconductor designs
- RTL coding proficiency in Verilog, SystemVerilog, or VHDL
- Design quality control using Lint, CDC, and DFT checks
- Synthesis, timing constraint development, and ECO experience
- Understanding of storage controller architectures and bus standards
- Cross-functional team collaboration with verification, validation, and physical design
- B.Tech, B.E, M.Tech, or M.E degree

## Nice to have

- Experience with RTL integration tools like Magillem
- Familiarity with high-speed serial protocols like PCIe, NVMe, UFS
- FPGA-based development experience
- Experience writing functional design documents and specifications

Apply on Samsung Semiconductor's site: https://sec.wd3.myworkdayjobs.com/en-US/Samsung_Careers/job/RTL-Design-Lead-Engineer_R109851