# Physical Design Engineer II (eInfochips Inc)

Hiring organization: [Arrow Electronics](https://career.thegoodapps.co/organizations/arrow-electronics)

Canonical page: https://career.thegoodapps.co/jobs/cab9008c-6929-4f5f-aa9e-8e65a33f3546

Listed on Arrow Electronics's own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Mid
- Location: San Jose, CA

## Summary

This role executes the physical design and place-and-route phases of ASIC chip development, collaborating with RTL and architecture teams to meet timing and power targets through the full implementation flow. It suits engineers with 7+ years of hands-on EDA tool experience who want to work on advanced-node chip design at scale.

_Our summary, not Arrow Electronics's wording._

## Skills named

Static Timing Analysis, Tcl

## Required

- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- 7+ years of hands-on physical design and implementation experience
- Proficiency with EDA tools such as Innovus, Tempus, and Quantus
- Deep understanding of physical design flows and methodologies

## Nice to have

- 7+ years in physical design roles
- Ability to adhere to tight schedules
- Low-power design techniques
- System-on-Chip design and implementation experience
- Sub-7nm node technology expertise
- Strong TCL scripting skills for custom EDA flows

Apply on Arrow Electronics's site: https://arrow.wd1.myworkdayjobs.com/en-US/AC/job/US-CA-San-Jose-California/Physical-Design-Engineer-II--eInfochips-Inc-_R246498