# Lead SOC RTL Design Engineer

Hiring organization: [Samsung Semiconductor](https://career.thegoodapps.co/organizations/samsung-semiconductor)

Canonical page: https://career.thegoodapps.co/jobs/bddeec7f-bfa0-49fe-bea3-eeb372945115

Listed on Samsung Semiconductor's own careers site. Applications go to them directly.

- Seniority: Senior

## Summary

This role leads a team of RTL designers at Samsung's India R&D center, focusing on SoC subsystem and IP design across high-speed and low-speed protocols. It suits experienced chip design engineers ready to move into technical leadership and work on cutting-edge semiconductor technologies for mobile, AI, and 5G applications.

_Our summary, not Samsung Semiconductor's wording._

## Skills named

Automotive Ethernet

## Required

- 9 to 12 years of SoC IP and subsystem design experience
- Experience with high-speed and low-speed protocol concepts
- Knowledge of SPI, I2C, I3C, UART, and PWM IP design
- Team management experience leading 4-5 engineers
- Architectural design experience at block and subsystem level
- Understanding of interconnect protocols (AXI, AHB, APB)
- Knowledge of design verification tools and flows (Lint, CDC, UPF, DFT)
- Design timing closure and verification expertise
- SoC dependency management and front-end task planning
- Effective communication and leadership skills
- Bachelor's or Master's degree in engineering

## Nice to have

- Experience with UCIe, Ethernet, or UFS IP design
- Experience with Host Controller, Unipro, or MPHY architecture

Apply on Samsung Semiconductor's site: https://sec.wd3.myworkdayjobs.com/en-US/Samsung_Careers/job/Lead-SOC-RTL-Design-Engineer_R109821