# Quality Reliability Engineer

Hiring organization: [Intel](https://career.thegoodapps.co/organizations/intel)

Canonical page: https://career.thegoodapps.co/jobs/b3f508bd-9041-4f2f-b68a-8448f17ed20c

Listed on Intel's own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Senior
- Location: Phoenix, AZ
- Salary: 120860 – 170630 USD per year

## Summary

This role leads reliability engineering for advanced semiconductor packages, establishing qualification strategies, investigating failures, and representing the company in industry standards bodies like JEDEC. It suits engineers with deep experience in semiconductor packaging reliability who want to shape both product quality and industry-wide standards.

_Our summary, not Intel's wording._

## Skills named

Design of Experiments (DOE), Failure Mode and Effects Analysis (FMEA)

## Required

- Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, Reliability Engineering, Physics, or related field with 3+ years industry experience, or PhD with 1+ years experience
- Experience in semiconductor package, board-level, or electronic system reliability
- Knowledge of reliability qualification methodologies including thermal cycling, mechanical shock, vibration, temperature-humidity testing, and accelerated stress testing
- Understanding of solder interconnect reliability, PCB technologies, SMT assembly processes, and package-to-board interactions
- Experience supporting failure analysis investigations and root cause determination
- Familiarity with reliability statistics, Weibull analysis, DOE, and data analysis techniques
- Working knowledge of FMEA, risk assessment methodologies, and reliability qualification planning
- Familiarity with JEDEC reliability and qualification standards
- Ability to represent company positions in technical discussions with customers, suppliers, and industry partners

## Nice to have

- Experience with advanced semiconductor packaging technologies including FCBGA, flip-chip, heterogeneous integration, chiplet-based architectures, or 2.5D/3D packaging
- Experience conducting board-level reliability testing and data interpretation
- Knowledge of thermo-mechanical failure mechanisms including solder fatigue, pad cratering, substrate cracking, delamination, and warpage effects
- Familiarity with finite element modeling or physics-of-failure approaches
- Prior participation in JEDEC, IPC, or similar industry standards activities
- Experience reviewing or contributing to reliability specifications, qualification requirements, or industry guidance documents
- Attendance at industry conferences, technical symposiums, or standards committee meetings
- Demonstrated initiative in driving reliability improvements and problem-solving efforts
- Ability to manage multiple projects and priorities in a fast-paced development environment
- Track record of successfully influencing technical decisions through data-driven analysis

Apply on Intel's site: https://intel.wd1.myworkdayjobs.com/en-US/External/job/US-Arizona-Phoenix/Quality-Reliability-Engineer_JR0286138-1