# SoC/IP Design Verification Engineer

Hiring organization: [Intel](https://career.thegoodapps.co/organizations/intel)

Canonical page: https://career.thegoodapps.co/jobs/a1c21b37-28b4-4fe1-8a0e-5d0b1c8935e9

Listed on Intel's own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Mid

## Summary

A design verification engineer role focused on building and executing comprehensive test strategies for complex semiconductor blocks and systems. This suits experienced verification professionals comfortable owning the full verification lifecycle from planning through coverage closure, with strong UVM and SystemVerilog expertise.

_Our summary, not Intel's wording._

## Skills named

Automotive Ethernet, C++, CMake, Make (Integromat), Python, SystemVerilog, Tai Chi, USB

## Required

- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 5+ years SoC/IP design verification experience
- UVM/SystemVerilog testbench development expertise including agents, drivers, monitors, sequencers, scoreboards, and virtual sequences
- Test planning: translating specifications into coverage-driven verification plans
- Debug proficiency in simulation and emulation environments
- Functional and code coverage modeling and closure
- Scripting with Python, Shell, or Make/CMake
- Advanced English fluency
- Unrestricted, permanent right to work in Mexico

## Nice to have

- SoC-level verification experience with fabric, interconnect, or security
- Experience with standard protocols like AXI, PCIe, DDR, USB, MIPI, or Ethernet and VIP integration
- Assertion-based verification and formal tools (SVA, JasperGold, VC Formal)
- Power-aware verification with UPF/CPF and multi-voltage domains
- Emulation or FPGA prototyping experience
- Performance and latency test content development
- C/C++/SystemC reference model development
- Experience leading teams or driving tapeout signoff

Apply on Intel's site: https://intel.wd1.myworkdayjobs.com/en-US/External/job/Mexico-Guadalajara/SoC-IP-Design-Verification-Engineer_JR0285869