# ASIC Implementation Engineer STA

Hiring organization: [Broadcom Inc.](https://career.thegoodapps.co/organizations/broadcom-inc)

Canonical page: https://career.thegoodapps.co/jobs/9fc59c27-e929-4cd4-a3db-e307355d558f

Listed on Broadcom Inc.'s own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Senior
- Location: San Jose, CA
- Salary: 143800 – 230000 USD per year

## Summary

This role leads static timing analysis and closure for ASIC designs, ensuring they meet performance targets across manufacturing and environmental variations. It suits engineers with deep expertise in timing constraints, sign-off tools, and automation who can drive complex multi-scenario analysis from RTL through physical design.

_Our summary, not Broadcom Inc.'s wording._

## Skills named

Cadence OrCAD/Allegro, Perl, Python, Static Timing Analysis, Tcl

## Required

- Bachelor's degree in Electrical Engineering or Computer Engineering
- Minimum 12 years of hands-on ASIC STA and timing constraints development
- Proficiency with Cadence or Synopsys sign-off tools
- Experience with on-chip variation derates and multi-mode multi-corner constraints
- Scripting proficiency in Tcl, Python, Perl, or Shell
- Strong problem-solving skills
- Effective team collaboration and communication

Apply on Broadcom Inc.'s site: https://broadcom.wd1.myworkdayjobs.com/en-US/External_Career/job/USA-CA-San-Jose-Innovation-Drive/ASIC-Implementation-Engineer-STA_R026202