# Senior DFT Engineer

Hiring organization: [NVIDIA](https://career.thegoodapps.co/organizations/nvidia)

Canonical page: https://career.thegoodapps.co/jobs/9cace216-de67-4e30-ad23-bbd210642122

Listed on NVIDIA's own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Senior
- Location: Santa Clara, CA
- Salary: 136000 – 264500 USD per year

## Summary

NVIDIA seeks an experienced DFT engineer to design and deploy advanced test methodologies for next-generation silicon, owning chip bring-up efforts from pre-silicon through production and mentoring junior team members. This role suits engineers with deep expertise in scan testing, BIST, fault modeling, and silicon debug who want to lead innovation in semiconductor test technology.

_Our summary, not NVIDIA's wording._

## Skills named

Perl, Python, SystemVerilog, Verilog

## Required

- 5+ years experience with BSEE or equivalent, or 3+ years with MSEE, or PhD in DFT or related field
- Expertise in scan test planning, BIST for memories and IOs, fault modeling, and ATPG
- Analytical skills in test pattern verification and validation on complex multi-million gate designs
- Experience in silicon debug and bring-up with understanding of pattern formats and test program development
- Strong programming and scripting skills
- Excellent written and oral communication

## Nice to have

- Deep understanding of DFT architecture
- Direct GPU/SoC bring-up experience with hands-on validation using oscilloscopes and logic analyzers
- Knowledge of fault models, DPPM, quality metrics, and RAS
- Understanding of InSystem Test methodologies, PVT dependencies, and VF characterization
- Proficiency working in collaborative, multi-functional environments

Apply on NVIDIA's site: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-DFT-Engineer_JR2020790