# DFT Design Engineer

Hiring organization: [Samsung Semiconductor](https://career.thegoodapps.co/organizations/samsung-semiconductor)

Canonical page: https://career.thegoodapps.co/jobs/9168487f-a0b5-437b-87a1-7542b843f383

Listed on Samsung Semiconductor's own careers site. Applications go to them directly.

- Seniority: Senior

## Summary

Samsung Semiconductor India seeks a Design for Test engineer with deep expertise in semiconductor verification and BIST architectures to lead DFT activities from concept through silicon validation. This senior role suits someone with 12-20 years' experience working across scan design, memory testing, and complex verification methodologies on cutting-edge semiconductor products.

_Our summary, not Samsung Semiconductor's wording._

## Skills named

SystemVerilog, Verilog

## Required

- 12-20 years DFT experience with end-to-end involvement from concept to silicon bring-up
- Scan and MBIST architecture design fundamentals
- Implementation and verification across RTL, gate-level and SDF simulation
- SDC constraint development
- Post-silicon debug and issue resolution
- B.Tech/B.E/M.Tech/M.E degree

## Nice to have

- Custom BIST design experience
- Cross-functional team collaboration
- Attention to detail and quality review practices

Apply on Samsung Semiconductor's site: https://sec.wd3.myworkdayjobs.com/en-US/Samsung_Careers/job/DFT-Design-Engineer_R109852
