# ASIC Design Engineer

Hiring organization: [NVIDIA](https://career.thegoodapps.co/organizations/nvidia)

Canonical page: https://career.thegoodapps.co/jobs/8d4a64fc-714d-4626-8bfb-f060469301f4

Listed on NVIDIA's own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Mid
- Location: Santa Clara, CA
- Salary: 116000 – 189750 USD per year

## Summary

This role involves designing high-performance, power-efficient hardware building blocks (RTL) for GPUs and SoCs used in AI, graphics, and autonomous systems. It suits engineers with 2+ years of digital design experience who are comfortable with Verilog, synthesis flows, and collaborating across large verification and silicon teams.

_Our summary, not NVIDIA's wording._

## Skills named

Computer Architecture, Perl, Python, Verilog

## Required

- BS or MS in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent experience
- 2+ years of RTL design experience
- Proficiency in Verilog and front-end design flows (synthesis, power, timing)
- Knowledge of digital systems, VLSI design, computer architecture, and computer arithmetic
- Coding skills in Perl, Python, or similar scripting languages
- Strong teamwork and interpersonal skills

## Nice to have

- C/C++ programming skills
- Experience with multi-clock domains and asynchronous logic
- Knowledge of interface protocols and arbitration schemes
- Strong debugging and analytical problem-solving abilities

Apply on NVIDIA's site: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/ASIC-Design-Engineer_JR2015189-1