# DFT Implementation Engineer

Hiring organization: [Intel](https://career.thegoodapps.co/organizations/intel)

Canonical page: https://career.thegoodapps.co/jobs/7d133984-37b0-49a8-a25d-5eadd5fa605f

Listed on Intel's own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Mid
- Location: Austin, TX
- Salary: 141910 – 200340 USD per year

## Summary

This role involves designing and implementing Design for Test capabilities into Intel's chip designs, working with RTL code and test methodologies to ensure manufacturability and quality. It suits experienced hardware engineers who want to influence product quality across multiple chip designs while collaborating with architecture, verification, and manufacturing teams.

_Our summary, not Intel's wording._

## Skills named

Perl, Python, SystemVerilog, Tcl, Verilog, VHDL

## Required

- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 5+ years of DFT, SoC design, or semiconductor design experience
- Tessent Shell flows and SSN methodology experience
- Hands-on ATPG, scan insertion, or MBIST/repair experience
- RTL design with Verilog, VHDL, or SystemVerilog

## Nice to have

- Tessent Fast IO and ISTK experience
- Large ASIC design or test exposure
- Low-power and high-performance SoC design familiarity
- Knowledge of IEEE 1687, IEEE 1149.1, IEEE 1500, IEEE 1838 standards
- Siemens EDA Tessent, Synopsys DFT Compiler, or Cadence Modus experience
- TCL, Perl, or Python scripting proficiency
- Timing constraints and low-power design methodology knowledge
- Cross-functional or complex SoC project experience

Apply on Intel's site: https://intel.wd1.myworkdayjobs.com/en-US/External/job/US-Texas-Austin/DFT-Implementation-Engineer_JR0285490