# CPU Digital Design Engineer

Hiring organization: [Baidu](https://career.thegoodapps.co/organizations/baidu)

Canonical page: https://career.thegoodapps.co/jobs/6e0e8f58-12c4-47fa-a6dc-4b18a873b889

Listed on Baidu's own careers site. Applications go to them directly.

- Seniority: Mid
- Location: Sunnyvale, CA

## Summary

This role involves designing efficient CPU controllers for 5G cellular modems, working on microarchitecture and RTL implementation with international teams at advanced process nodes. It suits engineers with hands-on experience in CPU architecture and digital design who want to ship high-performance, power-efficient processors.

_Our summary, not Baidu's wording._

## Skills named

Azure Resource Manager (ARM), FPGA, Risc-V, Static Timing Analysis

## Required

- Master's degree in Electrical Engineering, Computer Science, or Computer Engineering
- 3+ years of CPU design experience (architecture, RTL, verification, or implementation)
- Practical knowledge of RISC CPU architecture
- Ability to bring designs from concept to silicon

## Nice to have

- PhD in Electrical Engineering, Computer Science, or Computer Engineering
- 5+ years of CPU design experience
- Familiarity with chip digital design flow (RTL integration, simulation, STA, clock tree, low power)
- Experience with Symmetric Multi-threading (SMT)
- Experience with ARM, MIPS, or RISC-V CPUs
- Familiarity with Symmetric Multi-processing (SMP) and snoop-based multi-processor architecture
- Cross-site work experience
- Experience with foundry, post-silicon, FPGA, DVT, or SLT debug

Apply on Baidu's site: https://job-boards.greenhouse.io/baidu/jobs/4499622