# NVIDIA 2027 Internships: Hardware Design for Test (DFT)

Hiring organization: [NVIDIA](https://career.thegoodapps.co/organizations/nvidia)

Canonical page: https://career.thegoodapps.co/jobs/4d3c0184-1106-4ba0-b40a-fbd32a733a15

Listed on NVIDIA's own careers site. Applications go to them directly.

- Employment type: internship
- Seniority: Entry
- Location: Santa Clara, CA
- Salary: 20 – 71 USD per hour

## Summary

NVIDIA is seeking graduate students to work on hardware design for test infrastructure over a 12-week internship, contributing to chip validation and debugging on their accelerated computing platforms. This role suits ambitious engineers interested in semiconductor testing, timing analysis, and design automation within a leading AI hardware company.

_Our summary, not NVIDIA's wording._

## Skills named

C++, Digital Design, Linux, Perl, Python, Tcl

## Required

- Currently enrolled in M.S. or Ph.D. program in Electrical Engineering, Computer Engineering, or related field
- Anticipated graduation date clearly listed on resume or CV
- Course or internship experience in Design for Test (DFT), Digital Design, Test Architecture and DFT Planning, or Static Timing Analysis (STA)

## Nice to have

- Experience with Pre-Silicon and Post-Silicon issue debugging
- Knowledge of Scan Chain Design and ATPG
- Experience with Boundary Scan and JTAG
- Memory BIST (Built-In Self-Test) experience
- Logic BIST and compression techniques (EDT, Streaming Scan Network)
- At-Speed and Delay Testing experience
- Perl, TCL, C, C++, or Python programming experience
- Familiarity with Synopsys, TetraMAX, or Cadence Modus tools
- Linux experience

Apply on NVIDIA's site: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/NVIDIA-2027-Internships--Hardware-Design-for-Test--DFT-_JR2023487-1