# ASIC Implementation Engineer

Hiring organization: [Broadcom Inc.](https://career.thegoodapps.co/organizations/broadcom-inc)

Canonical page: https://career.thegoodapps.co/jobs/43f15f17-b934-4b0c-beeb-788b3090224e

Listed on Broadcom Inc.'s own careers site. Applications go to them directly.

- Seniority: Senior
- Location: San Jose, CA
- Salary: 143800 – 230000 USD per year

## Summary

Broadcom seeks a Physical Design Engineer to lead chip floorplanning and physical implementation from RTL through silicon tape-out, focusing on next-generation AI and PCIe Switch products. This role suits senior engineers with deep expertise in top-level floorplanning, clock trees, and cross-functional coordination across design, package, and methodology teams.

_Our summary, not Broadcom Inc.'s wording._

## Skills named

Perl, Python, Tcl

## Required

- Bachelor's in Electrical Engineering with 12+ years in top-level floorplanning, or Master's in Electrical Engineering with 10+ years
- Experience with die size estimation, partitioning, clocking, and pin planning
- On-site work in San Jose, no remote option

## Nice to have

- Experience with Switch Fabric, Arbiter, High Speed DDR, SerDes, HBM, D2D I/O, or chiplet technologies
- Chip-level DRC/LVS/EMIR resolution on advanced nodes
- Multi-voltage domain design
- Structured clocks and top-level pipeline planning
- Collaboration experience with design, package, and methodology teams

Apply on Broadcom Inc.'s site: https://broadcom.wd1.myworkdayjobs.com/en-US/External_Career/job/USA-CA-San-Jose-Innovation-Drive/ASIC-Implementation-Engineer_R026307