# GPU/SOC Low-Power Feature Architect - HSIO

Hiring organization: [NVIDIA](https://career.thegoodapps.co/organizations/nvidia)

Canonical page: https://career.thegoodapps.co/jobs/36f190c1-6934-49e2-8de1-6e061ba7afaa

Listed on NVIDIA's own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Senior
- Location: Santa Clara, CA
- Salary: 168000 – 310500 USD per year

## Summary

NVIDIA's Silicon Co-Design Group is hiring an engineer to develop next-generation high-speed interconnects like NVLink, focusing on power optimization and system integration across AI, graphics, and autonomous vehicle products. This role suits someone with deep expertise in HSIO design, power management, and cross-functional collaboration who wants to influence chip architecture decisions from early design through production.

_Our summary, not NVIDIA's wording._

## Skills named

Computer Architecture

## Required

- BS or MS in EE/CE or equivalent experience
- 10+ years of HSIO experience including power management, use case analysis, performance/power modeling, bringup, and/or debug
- System-level and interconnect power management optimization experience
- Silicon and platform-level power modeling for active and idle use cases
- Understanding of firmware and driver structures and their hardware interaction
- Strong electrical engineering fundamentals and computer architecture knowledge
- Experience with high-speed interfaces, timing analysis, process variations, and statistical error rates

## Nice to have

- Track record of cross-team influence, leadership, and collaboration

Apply on NVIDIA's site: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/HSIO-Functional-and-Power-Management-Engineer_JR2013743