# Staff ASIC Design Engineer

Hiring organization: [Ambarella](https://career.thegoodapps.co/organizations/ambarella)

Canonical page: https://career.thegoodapps.co/jobs/2bc654fd-f061-4d37-a58a-494dd2c9952c

Listed on Ambarella's own careers site. Applications go to them directly.

- Seniority: Senior
- Location: US Headquarters
- Salary: 195000 – 226000 USD per year

## Summary

Ambarella seeks an experienced VLSI designer to work on edge AI processor chips, focusing on video compression, image processing, and compute architectures across the full design stack from RTL to silicon. The role suits engineers who want visible impact on differentiated SoC designs rather than narrow functional blocks, with exposure to both micro-architecture decisions and real-world chip bring-up.

_Our summary, not Ambarella's wording._

## Skills named

Computer Architecture, Perl, Python, SystemVerilog, Verilog

## Required

- Master's degree in electrical engineering, electronics engineering, or computer engineering
- 5–10 years of VLSI or logic design experience
- Understanding of computer architecture and VLSI design
- Knowledge of SystemVerilog and Verilog
- Knowledge of design verification and functional coverage
- Ability to write assembly language programs
- Problem-solving skills

## Nice to have

- Knowledge of logic synthesis and timing closure

Apply on Ambarella's site: https://ambarella.wd108.myworkdayjobs.com/en-US/Ambarella/job/US-Headquarters/Staff-ASIC-Design-Engineer_JR100323