# Senior Signal Integrity Engineer – LPU Packaging

Hiring organization: [NVIDIA](https://career.thegoodapps.co/organizations/nvidia)

Canonical page: https://career.thegoodapps.co/jobs/1a78784f-88fd-427b-8e4f-c3a153bcdeff

Listed on NVIDIA's own careers site. Applications go to them directly.

- Seniority: Senior
- Location: Santa Clara, CA
- Salary: 168000 – 310500 USD per year

## Summary

NVIDIA seeks a signal integrity expert to design and optimize high-speed interconnect channels for advanced chip packages and data center systems. This role suits experienced engineers who excel at cross-functional collaboration and want to drive critical performance solutions for AI and HPC platforms.

_Our summary, not NVIDIA's wording._

## Skills named

Automotive Ethernet

## Required

- BS, MS, or PhD in Electrical Engineering or equivalent
- 8+ years signal integrity or high-speed interconnect design experience
- Electromagnetics and transmission line theory background
- High-speed SerDes design and analysis experience for advanced packaging or large-scale systems
- Proficiency with industry-standard SI tools (HFSS, SIwave, Cadence Sigrity, ADS, HSPICE or equivalent)
- Channel modeling and S-parameter experience
- Understanding of NRZ and PAM4 signaling, equalization, jitter, and noise mechanisms
- Simulation-to-measurement correlation experience with VNA, TDR, and oscilloscopes

## Nice to have

- Package and system SI experience for PCIe, CXL, NVLink, Ethernet or similar interfaces
- Deep knowledge of advanced packaging structures and chip-package-board co-design
- Data center, AI infrastructure, or HPC platform SI design background
- Experience improving SI signoff methodology or building automation flows
- Familiarity with SI, PI, thermal, mechanical, and manufacturability tradeoffs

Apply on NVIDIA's site: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Signal-Integrity-Engineer---LPU-Packaging_JR2019832