# DFT Methodology Engineer

Hiring organization: [NVIDIA](https://career.thegoodapps.co/organizations/nvidia)

Canonical page: https://career.thegoodapps.co/jobs/0886604b-24b0-424f-8909-8c2aea426b8e

Listed on NVIDIA's own careers site. Applications go to them directly.

- Employment type: full time
- Seniority: Senior
- Location: Santa Clara, CA
- Salary: 168000 – 310500 USD per year

## Summary

This role owns design-for-test methodology across NVIDIA's semiconductor products, architecting test solutions and verification strategies for next-generation chips while mentoring junior engineers. It suits experienced RTL and verification engineers who want to shape testing strategy on some of the industry's most complex designs.

_Our summary, not NVIDIA's wording._

## Skills named

Verification and Validation

## Required

- Master's degree in Electrical Engineering or equivalent experience
- 10+ years in SoC architecture, RTL design, and verification
- Analytical skills in test pattern and logic verification on complex multi-million gate designs
- Silicon debug and bring-up experience with ATE, pattern formats, and test program development
- Cross-functional knowledge of RTL, clocks, STA, place-and-route, and power trade-offs

## Nice to have

- DFT security knowledge
- Hardware system security experience

Apply on NVIDIA's site: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/DFT-Methodology-Engineer_JR2020884